An overhead-reduced, efficient, fully analog neural-network computing hardware.
Jiabao Ye, Wannian Wang, Caiping Shi, Xuecheng Cui, Wanyuan Qu, Peng Lin, Xiao Yu, Ran Cheng, Hanming Wu, Bing Chen
Abstract
Open AccessHuman brain-inspired neural-network computing hardware has the potential to overcome the energy efficiency and resource overhead challenges caused by the von Neumann bottleneck. However, existing neural-network computing hardware still exhibits a considerable gap compared to the human brain, likely due to the absence of complex data compression functions and the fully analog domain operating strategy adopted by the brain. To solve these problems, a fully analog neural-network computing hardware (FANCH) with input data compression is proposed and fabricated at both the chip and system levels in this work. FANCH implements the complete computational process of the neural networks using fully analog circuits. FANCH achieves an accuracy with only a 0.36% reduction from the software baseline in the handwritten digit recognition task. FANCH demonstrates advantages in energy efficiency compared to state-of-the-art artificial intelligence acceleration chips and systems. Our work provides an efficient fully analog hardware solution for edge computing applications with low hardware resource demands.